Printed electronic devices exhibiting improved yield
US10593684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2018 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Jul 18, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A printed electronic device may comprise a plurality of contact pads arranged in a pattern, a plurality of electrode traces arranged in another pattern, the plurality of electrode traces comprising a set of bottom electrode traces and a set of top electrode traces, each electrode trace in electrical communication with an associated contact pad of the plurality of contact pads, and a plurality of memory cells, each memory cell located at an intersection of a pair of electrode traces of the plurality of electrode traces and comprising a bottom electrode layer formed from a region of one of the bottom electrode traces, a top electrode layer formed from a region of one of the top electrode traces, and a ferroelectric layer between the bottom and top electrode layers. The plurality of contact pads comprises at least one unmodified contact pad having a surface area, shape and size, the plurality of contact pads further comprising at least one modified contact pad having a reduced surface area, and a different size, a different shape, or both, as compared to the at least one unmodified contact pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.