Lateral insulated-gate bipolar transistor and method therefor
US10593796B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2017 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Dec 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/817
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor includes a substrate of a first conductivity type. An epitaxial layer of the first conductivity type is formed at a top surface of the substrate. A first region of the first conductivity type is formed as a well in the epitaxial layer. A second region of a second conductivity type is formed as a well in the epitaxial layer adjacent to the first region and the second conductivity type is opposite of the first conductivity type. A third region of the second conductivity type is formed in the first region and a portion of the first region forms a channel region between the third region and the second region. An emitter region of the first conductivity type is formed in the second region. A gate dielectric is formed over the channel region, and a gate electrode is formed on gate dielectric with the gate electrode overlapping at least a portion of second region and the third region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.