Patent · US Active

Integer division circuit and method of performing integer division in hardware

US10599396B2 · kind B2 · utility

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12Claims
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Assignee

Inventors

Key dates

Filing dateMar 3, 2017
Grant dateMar 24, 2020
Priority date—
Expiry dateMay 15, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F5/01
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

An integer division circuit includes a first bit-shifting circuit configured to shift the bits of a dividend to produce a normalized dividend. The circuit also includes a second bit-shifting circuit configured to shift the bits of a divisor to produce a normalized divisor. A divider tree circuit is configured to divide the normalized dividend by the normalized divisor to produce a normalized quotient. The circuit further includes a third bit-shifting circuit configured to shift the bits of the normalized quotient to produce a quotient.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.