Nested hypervisor memory virtualization
US10599461B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2018 |
| Grant date | Mar 24, 2020 |
| Priority date | — |
| Expiry date | Jan 19, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2149
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure generally relates to hypervisor memory virtualization. In an example, multiple page table stages may be used to provide a page table that may be used by a processor when processing a workload for a nested virtual machine. An intermediate (e.g., nested) hypervisor may request an additional page table stage from a parent hypervisor, which may be used to virtualize memory for one or more nested virtual machines managed by the intermediate hypervisor. Accordingly, a processor may use the additional page table stages to ultimately translate a virtual memory address for a nested virtual machine to a physical memory address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.