Semiconductor structure and method for manufacturing the same
US10600809B2 · kind B2 · utility
1Cited by
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21Claims
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Key dates
| Filing date | Feb 13, 2017 |
| Grant date | Mar 24, 2020 |
| Priority date | — |
| Expiry date | Mar 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26586
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a semiconductor structure. The semiconductor structure includes a semiconductor-on-insulator (SOI) substrate having a bottom substrate, a buried oxide layer disposed on the bottom substrate, and a semiconductor layer disposed on the buried oxide layer. The semiconductor structure further includes a doped layer embedded in the semiconductor layer and above the buried oxide layer, and a contact structure extending into the semiconductor layer from the top surface of the semiconductor layer. The contact structure is electrically connected to the doped layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.