Solid state storage device and read retry method thereof
US10606518B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2018 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | Oct 19, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5604
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A solid state storage device includes a control circuit and a non-volatile memory. The control circuit includes a retry table. In addition, plural retry read-voltage sets are recorded in the retry table, and the retry table is divided into plural retry sub-tables. The plural retry read-voltage sets are classified into plural groups. The plural retry read-voltage sets are recorded into the corresponding retry sub-tables. The non-volatile memory is connected with the control circuit. During a read retry process of a read cycle, the control circuit performs a hard decoding process according to a retry sub-table of the plural retry sub-tables. If the hard decoding process fails, the control circuit performs a soft decoding process according to another retry sub-table of the plural retry sub-tables.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.