Method and apparatus for compiling computer language
US10606568B2 · kind B2 · utility
2Cited by
4References
20Claims
0Family size
Inventor
Key dates
| Filing date | Sep 27, 2018 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | Sep 27, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/427
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method including detecting, according to a preset syntax, whether an incorrect syntax unit exists in a to-be-compiled statement; when the detection result is yes, determining whether a child node at which the syntax unit is located is an optional node of a corresponding parent node; and when the determination result is yes, deleting the syntax unit. The present disclosure addresses the problem of low computer language compiling efficiency caused by the lack of a fault-tolerant computer language compiling technology in the conventional techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.