Hybrid genetic concolic co-verification of hardware and software
US10606732B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2018 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | May 25, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, a computer program product and a method for hybrid genetic concolic co-verification of hardware and software. The method comprises repeatedly obtaining a test input for a system comprising a software and a hardware; performing a symbolic co-simulation of the system executing the test input to generate a symbolic co-simulation constraint and utilizing the symbolic co-simulation constraint to generate a new test input. The symbolic co-simulation comprises iteratively performing concolic execution of the software and symbolic simulation of the hardware. The concolic execution is guided using the test input and monitors software symbols. Iteratively performing the concolic execution and the symbolic simulation comprises collecting both software symbolic constraints over the software symbols and hardware symbolic constraints over at least a portion of the software symbols to generate the symbolic co-simulation constraint that comprises the software symbolic constraints and the hardware symbolic constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.