Patent · US Active

Systems and methods for low latency access of memory between computing devices

US10606773B2 · kind B2 · utility

3Cited by
1References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 4, 2017
Grant dateMar 31, 2020
Priority date
Expiry dateJul 11, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/0026
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Disclosed are methods and systems for low latency modification of memory on a remote computer system. According to one aspect of the present disclosure, a method includes, at a first computing device, receiving from a second computing device, a memory access request including a security key and a unique identifier generated by the first computing device. The method further includes verifying, based on the security key and the unique identifier, that the first computing device is authorized to access a predetermined portion of memory. Also, in response to verifying that the first computing device is authorized to access the predetermined portion of memory, accessing, by the second computing device, the predetermined portion of memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.