Shift register unit and driving method thereof, gate driving circuit and display apparatus
US10607529B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Jun 14, 2016 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | Jun 28, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/06
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit and a driving method thereof, a gate driving circuit and a display apparatus are disclosed. The shift register unit includes: a pull-up node control module (21), a pull-down node control module (22), a gate driving signal output terminal (OUTPUT(N)) and a gate driving signal output module (23), the gate driving signal output module (23) is connected to a pull-up node (PU(N)), a pull-down node (PD(N)), an non-inverting clock signal input terminal (CLK) and the gate driving signal output terminal (OUTPUT(N) respectively; and the pull-down node control module (22) is connected to the pull-down node (PD(N)) and an inverting clock signal input terminal (CLKB) respectively; the shift register unit further includes: a noise reduction module (24) connected to a noise reduction control signal output terminal (Ctrl) and a gate driving signal output terminal respectively (OUTPUT(N)).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.