Display panel
US10608020B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2018 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | Oct 30, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel includes a substrate and a plurality of display dies. The display die is disposed on the substrate and includes a first source pad, a second source pad, a first common pad, a second common pad, a first gate pad, a second gate pad, a first transistor, a first LED, and a second LED. The first and second source pads are respectively disposed on the first and second sides of a circuit region. The first common pad and the first gate pad are disposed on the third side of the circuit region. The second common pad and the second gate pad are disposed on the fourth side of the circuit region. The first transistor is electrically connected to the first gate pad and the first common pad. The first and second LEDs are electrically connected between the first source pad and the first transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.