Power-on reset circuit and related reset method
US10608619B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2019 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | Mar 25, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00078
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power-on reset circuit arranged to generate a reset signal according to a power supply voltage includes: a power supply voltage detector, a holding circuit, a reference voltage generator and a reset determination circuit. The power supply voltage detector is controllable by the reset signal, and arranged to detect a level of the power supply voltage to generate a detection signal. The holding circuit is arranged to output an enablement signal according to the detection signal, wherein the holding circuit selectively maintains a level of the enablement signal according to a level of the detection signal. The reference voltage generator is controllable by the enablement signal to selectively output a reference voltage. The reset determination circuit is arranged to output the reset signal according to the power supply voltage and the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.