Detection circuit and method to mitigate 1/F noise in single detectors and in image sensors
US10612974B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2018 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Jun 29, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01J1/44
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit includes an input capacitor that stores charge based on a current received from a photodetector during a bias phase of the photodetector. The stored charge on the input capacitor is sampled during the sampling phase to determine an amount of light captured by the photodetector. A bias controller supplies a pulsed-bias voltage to the photodetector to generate the current from the photodetector. The bias controller controls the current to a current level below a predetermined current threshold via the pulsed-bias voltage before biasing of the detector and subsequent sampling of the stored charge on the input capacitor is initiated to mitigate 1/F noise in the photodetector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.