Devices and methods for isolating signals in semiconductor devices
US10615130B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 29, 2018 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Nov 29, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaged semiconductor device includes a substrate having a ground plane, a first communication port on the substrate, a second communication port on the substrate adjacent the first communication port, and grounding structures on the substrate. Each of the grounding structures is in contact with two different locations on the ground plane and is adjacent to one of the first and second communication ports. An electrically insulating material completely covers a top side of each of the grounding structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.