Array substrate, method for manufacturing the same, display panel, and display device
US10615193B2 · kind B2 · utility
2Cited by
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16Claims
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Key dates
| Filing date | Jan 31, 2018 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Jan 31, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An array substrate, a method for manufacturing the same, a display panel, and a display device are provided. In the method for manufacturing an array substrate provided by an embodiment of the present disclosure, the annealing process for the first active layer in the pixel area is performed by a high temperature required in the dehydrogenation process for the second active layer in the peripheral area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.