Inrush current limit circuitry and method
US10615593B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 7, 2017 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Aug 17, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/001
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An inrush current limiting method not requiring the use of a sense resistor, the method constituted of: generating a ramped voltage; comparing a first function of a voltage across a port capacitor with the generated ramp voltage; responsive to the outcome of the comparison of the voltage first function with the ramp voltage, controlling an electronically controlled switch coupled to the port capacitor such that the voltage across the port capacitor is a linear function of the generated ramped voltage; comparing a second function of the voltage at a terminal of the electronically controlled switch with a predetermined reference voltage; and responsive to the outcome of the comparison indicating that the second function of the terminal voltage is greater than the predetermined reference voltage, pulling the generated ramp voltage towards a predetermined shutoff voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.