Systems and methods for dynamic iteration control in a low-density parity-check (LDPC) decoder
US10615822B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2018 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Apr 19, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/005
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods described herein provides a method for dynamically allocating an iteration number for a decoder. The method includes receiving, at an input buffer, an input signal including at least one data packet. The method further includes calculating a first iteration number for decoding the at least one data packet. The method further includes monitoring at least one of available space of the input buffer and available decoding time for the at least one data packet. The method further includes dynamically adjusting the first iteration number to a second iteration number based on the available space or the available decoding time to continue decoding the at least one data packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.