Patent · US Active

System and method of clock management in a packet data network

US10615898B2 · kind B2 · utility

0Cited by
24References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 16, 2018
Grant dateApr 7, 2020
Priority date
Expiry dateJul 10, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04J3/0673
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

There is provided a method of clock management in a packet data network (PDN) implementing a time-transfer protocol and a clock controller configured to operate therein. The clock controller is configured to: obtain topology data informative of a master clock node and a slave clock node constituting end points of a PTP path in the PDN and further informative of at least part of transit nodes of said PTP path; periodically obtain data informative of queue size and link rate characterizing, during a collection period, the at least part of transit nodes in master-slave (MS) and slave-master (SM) directions; for each collection period, use the obtained queue-related data to estimate queue-induced delay asymmetry of the PTP path; and send the estimated value of queue-induced delay asymmetry to the slave node, the estimated value to be used by a clock residing on the slave node as delay asymmetry correction parameter.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.