Alternative representation of the crypto-algorithm DES
US10615962B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2016 |
| Grant date | Apr 7, 2020 |
| Priority date | — |
| Expiry date | Jan 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/16
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A processor device has an executable implementation of the cryptographic algorithm DES implemented with an XOR linkage operation at the round exit and an implemented computation step S arranged to map expanded right input values r′ as computation step entry values x=r′ onto exit values s=S[x]. The computation step S is implemented as a key-dependent computation step further comprises a key linkage operation for linking input values of the round with key values of the round derived directly or indirectly from the key. The computation step S is implemented as a combined key-dependent computation step T which further comprises: a permutation operation P associated with the round, arranged to be applied to exit values s of the computation step S and to supply the exit values s of the computation step in permutated form to the XOR linkage operation at the round exit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.