Method for manufacturing array substrate, array substrate and display device
US10620492B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 30, 2018 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Apr 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0212
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure relates to a method for manufacturing an array substrate, an array substrate and a display device. The method includes: disposing, on a substrate, a plurality of thin film transistors arranged in an array; depositing a first transparent electrode layer on the substrate and processing the first transparent electrode layer by using a first pattern process, so as to form a plurality of first electrodes connected with drains of the film transistors, and a connecting electrode connecting adjacent ones of the first electrodes; disposing a functional structure on a side of the first transparent electrode layer that is away from the substrate; and processing the connecting electrode by using a second pattern process and disconnecting the connecting electrode, so as to form a convex connection on an edge of the first electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.