Asynchronous core processor and a sensor node communication microcontroller including the same
US10620681B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2017 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Sep 23, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This asynchronous processor core comprises a loading unit for sequentially loading instruction lines, functional units for executing instructions and a decoder for decoding instruction lines loaded by the loading unit into instructions executable by the functional units. It comprises an execution control module configured as a two-state automaton: a sleep state (S1), wherein the asynchronous processor core awaits an interrupt control signal to execute an interrupt routine; an execution state (S2), wherein the decoder awaits a new interrupt routine instruction line to be decoded. The execution control module additionally manages a state variable (status) of the loading unit to selectively authorize or prevent, according to at least the value of this state variable (status), the loading of a new instruction line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.