Non-volatile storage device with adaptive data bus inversion
US10621116B2 · kind B2 · utility
4Cited by
7References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 8, 2017 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Jul 25, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes an inversion circuit configured to invert a data word, a first partial-inversion circuit configured to invert a first portion of the data word, a second partial-inversion circuit configured to invert a second portion of the data word, and an output selection circuit configured to compare: the data word, an output of the inversion circuit, an output of the first partial-inversion circuit, and an output of the second partial-inversion circuit with a prior data word, and to select an output according to respective numbers of changed bits from the prior data word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.