Patent · US Active

Using runtime reverse engineering to optimize DRAM refresh

US10622054B2 · kind B2 · utility

0Cited by

3References

19Claims

0Family size

Assignee

TU KAISERSLAUTERN · DE

Inventors

Deepak Mathew · Wilmington, US
Matthias Jung · Kreuztal, DE
Christian Weis · Scheidegg, DE
Norbert Wehn · Queidersbach, DE

Key dates

Filing date	Sep 5, 2018
Grant date	Apr 14, 2020
Priority date	—
Expiry date	Sep 5, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG11C2211/4061
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and a related DRAM controller for refreshing a DRAM with an external multi-row, multi-bank refresh function based on optimized command sequences involves determining, at initialization time of the DRAM, inter-operation timing parameters for the external multi-row, multi-bank refresh function, determining optimized timing parameters for row-level activation (ACT) and pre-charge (PRE) commands, and applying the optimized timing parameters for the row-level ACT and PRE commands for refreshing the DRAM with the external multi-row multi-bank refresh function. The auto-refresh function of an SDRAM is replaced.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.