Transistors with dual gate conductors, and associated methods
US10622452B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2018 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Jun 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate includes (a) a first gate conductor and a second gate conductor each extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure in a thickness direction, (b) a first separation dielectric layer separating the first gate conductor from the second gate conductor within the vertical gate, and (c) a gate dielectric layer separating each of the first gate conductor and the second gate conductor from the silicon semiconductor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.