Apparatuses for implementing cold-sparable SerDes
US10624246B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2017 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Jun 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K9/0067
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for limiting or diminishing current to unpowered Serializer/Deserializer (SerDes) circuitry is provided. The system comprises receiver input termination circuitry and a cold spare circuitry. The receiver input circuitry comprises a termination resistor and an N-type metal oxide silicon field effect transistor (MOSFET). The cold spare circuitry comprises a first MOSFET and a second MOSFET. When the system is powered on, an input current flows to the receiver input termination circuit to be discharged by the N-type MOSFET which is electrically connected to a ground. When the system is powered off, the input current flows to the cold spare circuitry to discharge the input current. Discharging electrons between the first MOSFET and the second MOSFET depends on the polarity of an accumulated voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.