Method for testing an electronic device and an interface circuit therefore
US10627445B2 · kind B2 · utility
0Cited by
2References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 24, 2018 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | Jul 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4923
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and interface circuit for testing an electronic device with a single logic pin is disclosed. The comprises forming a data stream having three level bands; inputting the data stream through a single logic pin; and decoding the data stream to identify a scan_in signal, a scan_shift_enable signal and a scan_out signal and returning contemporaneously a scan_out signal as an output through the same logic pin. The interface circuit includes a decoder connected to the single logic pin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.