Frequency synthesis systems
US10627850B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2019 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | May 14, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/66
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A frequency synthesis system includes a memory to store first and second digital control word pairs that each include a first and second control word. A first DAC system generates an analog sampling signal having a first sampling frequency based on a fixed clock signal and the first control word of the first pair during a first time duration having a second sampling frequency based on the first control word of the second pair during a second time duration. A second DAC system generates an analog output signal based on the second control word of the first pair and the first sampling frequency at the first time duration and based on the second control word of the second pair and the second sampling frequency at the second time duration. The analog output signal has a same predetermined output frequency at both the first and second time durations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.