Compiler transformation with loop and data partitioning
US10628141B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2018 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | May 19, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/452
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Logic may transform a target code to partition data automatically and/or autonomously based on a memory constraint associated with a resource such as a target device. Logic may identify a tag in the code to identify a task, wherein the task comprises at least one loop, the loop to process data elements in one or more arrays. Logic may automatically generate instructions to determine one or more partitions for the at least one loop to partition data elements, accessed by one or more memory access instructions for the one or more arrays within the at least one loop, based on a memory constraint, the memory constraint to identify an amount of memory available for allocation to process the task. Logic may determine one or more iteration space blocks for the parallel loops, determine memory windows for each block, copy data into and out of constrained memory, and transform array accesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.