Patent · US Active

Flash memory testing according to error type pattern

US10628247B2 · kind B2 · utility

0Cited by
4References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 15, 2018
Grant dateApr 21, 2020
Priority date
Expiry dateNov 17, 2038

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2207/2245
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A storage method comprises storing a retry table; wherein the retry table recites a plurality of error type patterns, the error type patterns comprises a plurality of default error types; accessing data stored in the flash memory; wherein an access error caused when a control circuit reads the data, the control circuit reads the retry table and performs testing according to the error type patterns sequentially to determine a current error type of the access error, and the control circuit performs an adjusted accessing action according to the current error type.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.