Semiconductor CMOS non-volatile memory device
US10629607B1 · kind B1 · utility
Inventors
Key dates
| Filing date | Oct 11, 2018 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | Oct 11, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6892
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device may operate with a logic transistor, which includes a transistor gate formed of a material. The memory device includes a floating gate formed of the material, a first-type fin, and a second-type fin. The first-type fin includes a first-type channel, a first-type source, and a first-type drain. The first-type channel, the first-type source, and the first-type drain have a first conductivity type. The second-type fin includes a second-type channel, a second-type source, and a second-type drain. The second-type source and the second-type drain have the first conductivity type. The second-type channel has a second conductivity type opposite to the first conductivity type. The floating gate is positioned on the first-type channel and the second-type channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.