Methods for reducing data errors in transceiving of a flash storage interface and apparatuses using the same
US10630424B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 20, 2018 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | Aug 19, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/203
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention introduces a method for reducing data errors in transceiving of a flash storage interface, performed by a processing unit of a first side, at least including: descrambling first data from a second side via an enabled descrambler of a lowest layer; determining whether a reception error is occurred by continuously monitoring first descrambled data; and when the reception error is occurred, disabling the descrambler of the lowest layer and issuing a first request to the second side for directing the second side to disable a scrambler, thereby disabling the second side to protect second data to be transmitted to the first side by using a data scrambling technique.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.