Microphone array system with Ethernet connection
US10631085B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 7, 2018 |
| Grant date | Apr 21, 2020 |
| Priority date | — |
| Expiry date | Dec 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R2420/09
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A microphone array configurable to connect via an Ethernet connection with an audio processor includes a plurality of MEMS microphones (7101-7121), a plurality of sigma-delta modulators (7201-7221), a processor and storage (90), and an Ethernet physical interface (80) operating at a network data transmission rate. Each sigma-delta modulator converts the analog output of a corresponding microphone into a bit stream at an audio sampling rate. The processor and storage performs a data-interleaving operation (92) to combine the bit streams from the sigma-delta modulators into a microphone audio frame serial bit stream (34), and loads the microphone audio frame serial bit stream into a FIFO memory (94) at a FIFO serial data load rate. The processor and storage computes an Ethernet FCS checksum on the microphone audio frame serial bit stream, concatenates, an FCS delay gap, the Ethernet FCS checksum, a timing gap, a frame prefix, a UDP/IP prefix, a payload, and the microphone audio frame serial bit stream to form an Ethernet frame packet serial bit stream, unloads this Ethernet packet serial bit stream from the FIFO memory at the network data transmission rate and transmits the Ethernet …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.