Apparatus and method for monitoring and predicting reliability of an integrated circuit
US10634714B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2016 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Aug 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2213/13162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Described is an apparatus which comprises: a first array of reliability monitors including first and second reliability monitors, wherein the first and second reliability monitors include first and second switches and first and second conductors, wherein the first and second switches are coupled to first and second conductors, respectively; and first and second comparators coupled to the first and second switches, respectively. Described is an apparatus which comprises: a conductor formed on a metal layer; a switch having a source terminal coupled to the conductor, and a drain terminal coupled to a power supply node, wherein the switch is controllable by a controller; and a comparator having a first input coupled to the power supply node and to the switch, wherein the comparator includes a second input coupled to an adjustable reference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.