System and method for host system memory translation
US10635584B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2017 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Nov 27, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for host system memory translation are disclosed. The memory system may send a logical-to-physical address translation table to the host system. Thereafter, the host system may send commands that include a logical address and a physical address (with the host system using the logical-to-physical address translation table previously sent to generate the physical address). After sending the table to the host system, the memory system may monitor changes in the table, and record these changes in an update table. The memory system may use the update table in determining whether to accept or reject the physical address sent from the host system in processing the host system command. In response to determining to reject the physical address, the memory system may internally generate the physical address using the logical address sent from the host system and a logical-to-physical address translation table resident in the memory system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.