Controlled-phase quantum logic gate
US10635989B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2017 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Apr 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N60/805
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit QED implementation of a control-phase quantum logic gate UCP(θ)=diag[1,1,1, eiθ]. Two qubits Qi, two resonators Ra, Rb and a modulator. Q1 and Q2, each has a frequency ωqi and characterized by {circumflex over (σ)}zi. Ra is associated with Q1 and defined by a quantum non-demolition (QND) longitudinal coupling g1z{circumflex over (σ)}1z(â†+â). Rb is integrated into Ra, the QND second longitudinal coupling is defined by Ra as g2z{circumflex over (σ)}2z({circumflex over (b)}†+{circumflex over (b)}) or, when Rb is integrated into Ra, the QND second longitudinal coupling is defined by Ra as g2z{circumflex over (σ)}2z(â†+â) The modulator periodically modulates, at a frequency ωm during a time t, the longitudinal coupling strengths g1z and g2z with respective signals of respective amplitudes {tilde over (g)}1 and {tilde over (g)}2. Selecting a defined value for each of t, g1z and g2z determines θ to specify a quantum logical operation performed by the gate. Q1 and Q2 are decoupled when either one of g1z and g2z is to set to 0.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.