Shift register, gate driver, and driving method of shift register
US10636372B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Aug 4, 2017 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Aug 4, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses a shift register, comprising: a first capacitor with a first terminal connected to a first pull-up node and a second terminal connected to a second pull-up node; a first thin-film transistor with a gate connected to the first pull-up node, a first electrode connected to the second pull-up node and a second electrode connected to a first clock signal input terminal; a second thin-film transistor with a gate connected to the second pull-up node, a first electrode connected to an output of the shift register, and a second electrode connected to a DC high level signal terminal; and an input control circuit The first capacitor, the first capacitor and the first thin-film transistor boost the voltage on the first pull-up node so as to make a clock signal inputted from the first clock signal input terminal pass to the second pull-up node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.