Semiconductor device for preventing crack in pad region and fabricating method thereof
US10636703B2 · kind B2 · utility
7Cited by
7References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 12, 2016 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Dec 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device which prevents a crack from occurring on a pad region is provided. The semiconductor device includes a lower pad, an upper pad which is formed above the lower pad, an insulation layer which is formed between the lower pad and the upper pad, a via net for electrically connecting the lower pad and the upper pad in the insulation layer, the via net having a net shape in which a unit grid is connected with its adjacent unit grids to form a net structure, and at least one via hole for electrically connecting the lower pad and the upper pad in the unit grid of the via net.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.