Printed wiring board
US10636741B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 26, 2018 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Dec 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10674
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A printed wiring board includes a core substrate, and a build-up layer formed on the substrate. The substrate includes core material, third conductor layer, fourth conductor layer, and through-hole conductors. The build-up layer is formed on the core material and third conductor layer and includes insulating layers, first conductor layers, and via conductors. The build-up layer has central area and outer peripheral area such that the via conductors include central area via conductors and outer peripheral area via conductors, diameter of central area via conductor is smaller than diameter of outer peripheral area via conductor, the outermost first conductor layer includes first pads to mount first electronic component and second pads to mount second electronic component, the first and second pads are connected to each other via the central via conductors, and the lowermost insulating layer does not have the via conductors in the central area of the build-up layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.