Semiconductor device including circuit having security function
US10636751B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2016 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Dec 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/544
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device 100 of the present invention includes a front end and back ends A and B, each including a plurality of layers. Further, in the plurality of layers of the back end B, (i) circuits 22, 23, and 24 having a security function are provided in at least one layer having a wiring pitch of 100 nm or more, (ii) a circuit having a security function is provided in at least one wiring layer in M5 or higher level (M5, M6, M7, . . . ), (iii) a circuit having a security function is provided in at least one layer, for which immersion ArF exposure does not need to be used, or (iv) a circuit having a security function is provided in at least one layer that is exposed by using an exposure wavelength of 200 nm or more.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.