Regulator with high speed nonlinear compensation
US10637266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2016 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Sep 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J2207/20
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.