Single chip for generating multiple differential signals and loop-through signals according to a single-ended RF signal
US10637417B1 · kind B1 · utility
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Key dates
| Filing date | Nov 28, 2018 |
| Grant date | Apr 28, 2020 |
| Priority date | — |
| Expiry date | Dec 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G2201/103
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A single chip for generating multiple differential signals and loop-through signals according to a single-ended RF signal inputted to the single chip, wherein delays between different channels of the multiple differential signals and loop-through signals can be minimized for supporting picture-in-picture applications; in addition, the single chip can integrate a power detector and an AGC circuit for controlling the gain of an LNA inside the single chip, and the gain of the LNA can be outputted from the single chip for different usages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.