Patent · US Active

Solid state drive with reset circuit and reset method thereof

US10642328B2 · kind B2 · utility

0Cited by

1References

9Claims

0Family size

Assignee

SOLID STATE STORAGE TECHNOLOGY CORPORATION · TW

Inventors

I-Hsiang Chiu · 溪州鄉, TW
Shih-Hung Hsieh · Taipei, TW

Key dates

Filing date	Dec 5, 2017
Grant date	May 5, 2020
Priority date	—
Expiry date	Dec 21, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG06F2213/0026
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A solid state drive with a reset circuit includes a controlling circuit, a flash array and a buffer. The controlling circuit includes a physical layer circuit and a first input/output port. The first input/output port is connected with a first reset terminal of a host. The flash array and the buffer are connected with the controlling circuit. When the first reset terminal of the host activates a reset signal, a voltage level of the first input/output port is changed. After a delay time, the voltage level of a second reset terminal of the physical layer circuit is changed and the physical layer circuit is reset.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.