Patent · US Active

Modular periphery tile for integrated circuit device

US10642946B2 · kind B2 · utility

2Cited by

0References

17Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Chee Hak Teh · Kampung Bukit Kechil, MY
Ankireddy Nalamalpu · Portland, US
MD Altaf Hossain · Portland, US
Dheeraj Subbareddy · Santa Clara, US
Sean R. Atsatt · Santa Cruz, US
Lai Guan Tang · Bayan Lepas, MY

Key dates

Filing date	Dec 28, 2018
Grant date	May 5, 2020
Priority date	—
Expiry date	Dec 28, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH01L23/5385
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Systems or methods of the present disclosure may improve scalability (e.g., component scalability, product variation scalability) of integrated circuit systems by disaggregating periphery intellectual property (IP) circuitry into modular periphery IP tiles that can be installed as modules. Such an integrated circuit system may include a first die that includes programmable fabric circuitry and a second die that that includes a periphery IP tile. The periphery IP tile may be disaggregated from the programmable fabric die and may be communicatively coupled to the first die via a modular interface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.