Gate driver and display device including the same
US10643546B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2018 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Jul 12, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver and a display device including the same are disclosed. The gate driver includes a plurality of stages. Each stage includes a transistor T6 outputting an emission signal of a gate-on voltage to a node Na while a node Q is activated, a transistor T7 outputting the emission signal of a gate-off voltage to the node Na while a node QB is activated, a Q controller controlling a voltage of the node Q depending on a clock signal ECLK1 and a clock signal ECLK2 that are in antiphase, and a voltage of a node Q′, a QB controller controlling a voltage of the node QB depending on the clock signal ECLK1, the voltage of the node Q, and the voltage of the node Q′, and a capacitor CQ connected between an input terminal of the clock signal ECLK1 and the node Q.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.