Semiconductor device having a structure for insulating layer under metal line
US10643926B2 · kind B2 · utility
1Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2018 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Jul 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/11
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a via plug formed on a substrate and a metal layer for interconnection formed at an end of the via plug, wherein an insulating structure is under the metal layer for interconnection and the insulating structure has a different layered structure according to a positional relationship with the metal layer for interconnection is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.