Via-hole connection structure and method of manufacturing the same, and array substrate and method of manufacturing the same
US10644037B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 26, 2018 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Mar 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a via-hole connection structure and a method of manufacturing the same and an array substrate and a method of manufacturing the same. In an embodiment, a method of manufacturing a via-hole connection structure, includes the following steps of: forming a first conductive layer on a substrate, and patterning the first conductive layer to form a first conductive pattern on which a first photoresist pattern is provided; forming a first insulation layer covering the first conductive layer and the first photoresist pattern; patterning the first insulation layer to form a first via-hole from which at least a portion of the first photoresist pattern is exposed; removing the at least a portion of the first photoresist pattern exposed from the first via-hole; and forming a second conductive pattern, wherein the second conductive pattern is electrically connected to the first conductive pattern through the first via-hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.