Method for manufacturing array substrate, array substrate and fingerprint recognition device
US10644042B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 21, 2018 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | May 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F30/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing an array substrate, an array substrate, and a fingerprint recognition device. The method includes: forming a plurality of polysilicon patterns on a substrate, the plurality of polysilicon patterns including a first polysilicon pattern for forming the PIN-type diode and a second polysilicon pattern for forming the transistor, each polysilicon pattern including a first sub-region, a second sub-region, and a third sub-region between the first sub-region and the second sub-region; using a first doping process to dope the first sub-region of the first polysilicon pattern and the first sub-region and the second sub-region of the second polysilicon pattern with one of P-type ions and N-type ions respectively; and using a second doping process to dope the second sub-region of the first polysilicon pattern with the other of P-type ions and N-type ions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.