Patent · US Active

Pipelined analog-to-digital converter

US10644714B2 · kind B2 · utility

0Cited by
1References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 19, 2019
Grant dateMay 5, 2020
Priority date
Expiry dateMar 19, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/361
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An analog-to-digital converter including a first stage and a second stage. The first stage includes a first sample-and-hold (SH) having an input coupled to a voltage input node of the ADC, and having a first SH output. The first stage also includes a buffer, a first flash converter and a first digital-to-analog converter (DAC). The buffer has an input coupled to the first SH output and has a buffer output. The first flash converter has an input coupled to the first SH output, and has a first flash converter output. The first DAC has an input coupled to the first flash converter output. The second stage includes a second flash converter having an input coupled to the buffer output.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.