Method, device, and system for synchronizing clocks of processors
US10644867B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2018 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Sep 6, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W84/18
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A wireless communication clock synchronized with a peer electronic device in the network is established at the first electronic device. Interruption signals are generated by the first electronic device synchronously with the peer accordingly. A clock value of a processor of the first electronic device at generating a last interruption signal is recorded by the first electronic device. A synchronization request including the clock value recorded is sent to the peer, to trigger adjusting, by the peer according to a difference between the clock value recorded by the first electronic device and a clock value recorded by the peer, a clock of a processor of the peer electronic device to be synchronized with a clock of the processor of the first electronic device. The clock value recorded by the peer electronic device is the clock value of the processor of the peer electronic device at generating a last interruption signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.