Device-contained data plane validation
US10644985B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2016 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Jul 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L43/0817
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A device may configure a state of a data plane to test the state of the data plane using a set of components. The device may provide a set of packets from a first virtual component of the device to a first port of the device. The first virtual component may include a first virtual representation of a first device. The first virtual component may be included in the set of components. The device may loop back the set of packets at the first port of the device based on providing the set of packets to the first port. The device may perform an action based on the state of the data plane in association with looping back the set of packets at the first port. The device may determine whether a test of the state of the data plane is associated with a pass status or a fail status.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.